A digital clock manager (DCM) is an electronic component available on some FPGAs (notably ones produced by Xilinx). A DCM is useful for manipulating clock signals inside the FPGA, and to avoid clock skew which would introduce errors in the circuit.
Uses of DCM
DCMs have the following applications:[1]
Multipling or dividing an incoming clock (which can come for outside the FPGA or from a Digital Frequency Syntetizer [DFS]).
Making sure the clock has a steady duty cycle.
Adding a phase shift with the additional use of a Delay-locked loop.
Eliminating clock skew within an FPGA design.
See also
Clock signal
Delay-locked loop
Phase-locked loop