Lattice Mapping Report File for Design Module 'calculator' Design Information Command line: map -a MachXO2 -p LCMXO2-4000HC -t CSBGA132 -s 4 -oc Commercial calculator_impl1.ngd -o calculator_impl1_map.ncd -pr calculator_impl1.prf -mp calculator_impl1.mrp -lpf C:/Users/TEST/Desktop/calculator_fpga_mico8/i mpl1/calculator_impl1_synplify.lpf -lpf C:/Users/TEST/Desktop/calculator_fpga_mico8/calculator.lpf -c 0 -gui -msgset C:/Users/TEST/Desktop/calculator_fpga_mico8/promote.xml Target Vendor: LATTICE Target Device: LCMXO2-4000HCCSBGA132 Target Performance: 4 Mapper: xo2c00, version: Diamond (64-bit) 3.8.0.115.3 Mapped on: 10/26/17 14:31:19 Design Summary Number of registers: 254 out of 4635 (5%) PFU registers: 252 out of 4320 (6%) PIO registers: 2 out of 315 (1%) Number of SLICEs: 640 out of 2160 (30%) SLICEs as Logic/ROM: 637 out of 2160 (29%) SLICEs as RAM: 3 out of 1620 (0%) SLICEs as Carry: 240 out of 2160 (11%) Number of LUT4s: 1280 out of 4320 (30%) Number used as logic LUTs: 794 Number used as distributed RAM: 6 Number used as ripple logic: 480 Number used as shift registers: 0 Number of PIO sites used: 39 + 4(JTAG) out of 105 (41%) Number of block RAMs: 0 out of 10 (0%) Number of GSRs: 1 out of 1 (100%) EFB used : No JTAG used : No Readback used : No Oscillator used : No Startup used : No POR : On Bandgap : On Number of Power Controller: 0 out of 1 (0%) Number of Dynamic Bank Controller (BCINRD): 0 out of 6 (0%) Number of Dynamic Bank Controller (BCLVDSO): 0 out of 1 (0%) Number of DCCA: 0 out of 8 (0%) Number of DCMA: 0 out of 2 (0%) Number of PLLs: 0 out of 2 (0%) Number of DQSDLLs: 0 out of 2 (0%) Number of CLKDIVC: 0 out of 4 (0%) Number of ECLKSYNCA: 0 out of 4 (0%) Number of ECLKBRIDGECS: 0 out of 2 (0%) Notes:- 1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of distributed RAMs) + 2*(Number of ripple logic) 2. Number of logic LUT4s does not include count of distributed RAM and ripple logic. Number of clocks: 1 Net clk_in_c: 145 loads, 145 rising, 0 falling (Driver: PIO clk_in ) Number of Clock Enables: 31 Net Uart_Tx_u.num_0_sqmuxa: 1 loads, 0 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/clk_200khz_RNIQSS8: 20 loads, 20 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/clk_200khz_RNINR481: 2 loads, 2 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/clk_200khz_RNIMQ481: 2 loads, 2 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/sda_out_r_RNO: 1 loads, 1 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/un31_0_m2_RNI1U121: 4 loads, 4 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/state_RNIMRON1[2]: 1 loads, 1 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/data_wr_2_sqmuxa_0_a2_RNI911H1: 4 loads, 4 LSLICEs Net cap1298_top_u/cap1298_i2c_u1/un21_i_a2_0_a2_0_RNICHCS4[1]: 2 loads, 2 LSLICEs Net state_1_sqmuxa_1_1_a3_RNI3DO23: 1 loads, 0 LSLICEs Net cap1298_top_u/un1_sensor_data1_1_i: 3 loads, 3 LSLICEs Net cap1298_top_u/un1_key_num15_2_i: 1 loads, 1 LSLICEs Net cap1298_top_u/un1_key_num16_i: 1 loads, 1 LSLICEs Net N_765_i: 1 loads, 1 LSLICEs Net uart_tx_en: 3 loads, 3 LSLICEs Net Uart_Tx_u/uart_tx_valid_1_sqmuxa_i: 1 loads, 1 LSLICEs Net Uart_Tx_u/nume: 2 loads, 2 LSLICEs Net Uart_Tx_u/un1_uart_tx_en: 1 loads, 1 LSLICEs Net compute_u/N_1133: 8 loads, 8 LSLICEs Net compute_u/un1_value1_0_sqmuxa_i: 7 loads, 7 LSLICEs Net compute_u/txstate[0]: 3 loads, 3 LSLICEs Net compute_u/txstate[3]: 1 loads, 1 LSLICEs Net compute_u/operate2_flag_RNO: 1 loads, 1 LSLICEs Net compute_u/un56_0_0_0_a2_RNIHE931: 2 loads, 2 LSLICEs Net compute_u/un1_state_9_i: 17 loads, 17 LSLICEs Net compute_u/un1_state_10_i: 8 loads, 8 LSLICEs Net compute_u/N_337_i: 1 loads, 1 LSLICEs Net compute_u/N_706: 3 loads, 3 LSLICEs Net compute_u/un49_0_0_0: 2 loads, 2 LSLICEs Net compute_u/N_436_i: 1 loads, 1 LSLICEs Net compute_u/un57_0_0_0: 2 loads, 2 LSLICEs Number of local set/reset loads for net rst_n_in_c merged into GSR: 218 Number of LSRs: 2 Net compute_u/N_64: 6 loads, 6 LSLICEs Net compute_u/state_RNIRAEG1[7]: 2 loads, 2 LSLICEs Number of nets driven by tri-state buffers: 0 Top 10 highest fanout non-clock nets: Net compute_u/value2[0]: 55 loads Net compute_u/state[2]: 52 loads Net cap1298_top_u/cap1298_i2c_u1/state[0]: 45 loads Net compute_u/value2[1]: 33 loads Net compute_u/value2[2]: 33 loads Net compute_u/value2[3]: 32 loads Net compute_u/value2[4]: 30 loads Net compute_u/value2[5]: 30 loads Net compute_u/value2[6]: 28 loads Net compute_u/value2[7]: 28 loads Number of warnings: 8 Number of errors: 0 Design Errors/Warnings WARNING - map: C:/Users/TEST/Desktop/calculator_fpga_mico8/calculator.lpf(49): Semantic error in "IOBUF PORT "sda_out[1]" PULLMODE=UP IO_TYPE=LVCMOS33 ;": Port "sda_out[1]" does not exist in the design. This preference has been disabled. WARNING - map: C:/Users/TEST/Desktop/calculator_fpga_mico8/calculator.lpf(50): Semantic error in "IOBUF PORT "sda_out[2]" PULLMODE=UP IO_TYPE=LVCMOS33 ;": Port "sda_out[2]" does not exist in the design. This preference has been disabled. WARNING - map: Preference parsing results: 2 semantic errors detected. WARNING - map: Using local reset signal 'rst_n_in_c' to infer global GSR net. WARNING - map: IO buffer missing for top level port sda_out[2:0](2)...logic will be discarded. WARNING - map: IO buffer missing for top level port sda_out[2:0](1)...logic will be discarded. WARNING - map: IO buffer missing for top level port uart_in...logic will be discarded. WARNING - map: There are semantic errors in the preference file C:/Users/TEST/Desktop/calculator_fpga_mico8/calculator.lpf. IO (PIO) Attributes +---------------------+-----------+-----------+------------+ | IO Name | Direction | Levelmode | IO | | | | IO_TYPE | Register | +---------------------+-----------+-----------+------------+ | sda_out[0] | BIDIR | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | scl_out[1] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | scl_out[0] | OUTPUT | LVCMOS33 | OUT | +---------------------+-----------+-----------+------------+ | clk_in | INPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | lcd_data_out | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | lcd_clk_out | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | lcd_dc_out | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | lcd_cs_out | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | lcd_rst_out | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[8] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[7] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[6] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[5] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[4] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[3] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[2] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[1] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_2[0] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[8] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[7] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[6] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[5] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[4] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[3] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[2] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[1] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | segment_led_1[0] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[7] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[6] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[5] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[4] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[3] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[2] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[1] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | led_out[0] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | uart_out | OUTPUT | LVCMOS33 | OUT | +---------------------+-----------+-----------+------------+ | scl_out[2] | OUTPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ | rst_n_in | INPUT | LVCMOS33 | | +---------------------+-----------+-----------+------------+ Removed logic Block compute_u/bin_bcd_u/GND undriven or does not drive anything - clipped. Block Baud_tx/VCC undriven or does not drive anything - clipped. Block Uart_Tx_u/VCC undriven or does not drive anything - clipped. Block Uart_Tx_u/GND undriven or does not drive anything - clipped. Block cap1298_top_u/VCC undriven or does not drive anything - clipped. Block cap1298_top_u/GND undriven or does not drive anything - clipped. Block cap1298_top_u/display_u/GND undriven or does not drive anything - clipped. Block cap1298_top_u/cap1298_i2c_u1/VCC undriven or does not drive anything - clipped. Block cap1298_top_u/cap1298_i2c_u1/GND undriven or does not drive anything - clipped. Signal rst_n_in_c_i was merged into signal rst_n_in_c Signal sda_out_r_cl_i was merged into signal cap1298_top_u/cap1298_i2c_u1/sda_out_r_cl Signal compute_u/GND undriven or does not drive anything - clipped. Signal Baud_tx/GND undriven or does not drive anything - clipped. Signal compute_u/cal_result_8_m0_s_11_0_S1 undriven or does not drive anything - clipped. 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Signal compute_u/cal_result_4_madd_1_cry_1_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_26 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_1_cry_8_0_COUT undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_3_cry_1_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_3_cry_1_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_27 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_3_cry_4_0_COUT undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_4_cry_1_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_4_cry_1_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_28 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_4_cry_2_0_COUT undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_cry_0_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_30 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_s_3_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_s_3_0_COUT undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_9_cry_0_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_9_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_31 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_9_s_7_0_S1 undriven or does not drive anything - clipped. Signal compute_u/cal_result_4_madd_9_s_7_0_COUT undriven or does not drive anything - clipped. Signal compute_u/un1_cnt_delay_2_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_32 undriven or does not drive anything - clipped. Signal compute_u/un1_cnt_delay_2_cry_9_0_COUT undriven or does not drive anything - clipped. Signal compute_u/un4_value1_cry_0_0_S1 undriven or does not drive anything - clipped. Signal compute_u/un4_value1_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_33 undriven or does not drive anything - clipped. Signal compute_u/un4_value1_cry_13_0_COUT undriven or does not drive anything - clipped. Signal compute_u/un4_value2_cry_0_0_S1 undriven or does not drive anything - clipped. Signal compute_u/un4_value2_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_34 undriven or does not drive anything - clipped. Signal compute_u/un4_value2_cry_13_0_COUT undriven or does not drive anything - clipped. Signal compute_u/cal_result_8_m0_cry_0_0_S0 undriven or does not drive anything - clipped. Signal compute_u/N_2 undriven or does not drive anything - clipped. Signal Baud_tx/cnt_cry_0_S0[0] undriven or does not drive anything - clipped. Signal Baud_tx/N_1 undriven or does not drive anything - clipped. Signal Baud_tx/cnt_cry_0_COUT[5] undriven or does not drive anything - clipped. Block rst_n_in_pad_RNIGMQ9 was optimized away. Block cap1298_top_u/cap1298_i2c_u1/sda_out_r_cl_RNI2EQ4 was optimized away. Block compute_u/GND was optimized away. Block Baud_tx/GND was optimized away. Memory Usage /: EBRs: 0 RAM SLICEs: 2 Logic SLICEs: 19 PFU Registers: 33 /compute_u/bcd_data_reg_ram: EBRs: 0 RAM SLICEs: 1 Logic SLICEs: 0 PFU Registers: 0 GSR Usage --------- GSR Component: The local reset signal 'rst_n_in_c' of the design has been inferred as Global Set Reset (GSR). The reset signal used for GSR control is 'rst_n_in_c'. GSR Property: The design components with GSR property set to ENABLED will respond to global set reset while the components with GSR property set to DISABLED will not. Run Time and Memory Usage ------------------------- Total CPU Time: 1 secs Total REAL Time: 0 secs Peak Memory Usage: 55 MB Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. Copyright (c) 2002-2016 Lattice Semiconductor Corporation, All rights reserved.