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| 后一修订版 | 前一修订版 | ||
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blink_test [2016/06/02 14:01] anran 创建 |
blink_test [2016/08/03 19:33] (当前版本) zhijun |
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| 行 5: | 行 5: | ||
| // >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< | // >>>>>>>>>>>>>>>>>>>>>>>>> COPYRIGHT NOTICE <<<<<<<<<<<<<<<<<<<<<<<<< | ||
| // -------------------------------------------------------------------- | // -------------------------------------------------------------------- | ||
| - | // Module: Blink_test | + | // File name : blink_test.v |
| - | // | + | // Module name : blink_test |
| - | // Author: Step | + | // Author : STEP |
| - | // | + | // Description : testbench for blink.v |
| - | // Description: testbench for Blink | + | // Web : www.stepfpga.com |
| - | // | + | |
| - | // Web: www.ecbcamp.com | + | |
| // | // | ||
| // -------------------------------------------------------------------- | // -------------------------------------------------------------------- | ||
| 行 20: | 行 18: | ||
| // -------------------------------------------------------------------- | // -------------------------------------------------------------------- | ||
| `timescale 1ns / 100ps | `timescale 1ns / 100ps | ||
| - | module Blink_test; | + | module blink_test; |
| parameter CLK_PERIOD = 40; //CLK_PERIOD=40ns, Frequency=25MHz | parameter CLK_PERIOD = 40; //CLK_PERIOD=40ns, Frequency=25MHz | ||
| - | reg sys_clk; | + | reg sys_clk; |
| + | reg sys_rst_n; //active low | ||
| + | wire led_out; | ||
| initial | initial | ||
| sys_clk = 1'b0; | sys_clk = 1'b0; | ||
| 行 30: | 行 31: | ||
| sys_clk = #(CLK_PERIOD/2) ~sys_clk; | sys_clk = #(CLK_PERIOD/2) ~sys_clk; | ||
| - | reg sys_rst_n; //active low | + | |
| initial | initial | ||
| begin | begin | ||
| 行 38: | 行 39: | ||
| end | end | ||
| - | wire led_out; | + | blink #(.CNT_NUM(10)) blink_uut( |
| - | + | .clk_in (sys_clk), | |
| - | Blink # | + | .rst_n_in (sys_rst_n), |
| - | (.CNT_NUM(10)) | + | .led_out (led_out) |
| - | Blink_uut | + | ); |
| - | ( | + | |
| - | .clk_in(sys_clk), | + | |
| - | .rst_n_in(sys_rst_n), | + | |
| - | .led_out(led_out) | + | |
| - | ); | + | |
| endmodule | endmodule | ||
| </code> | </code> | ||