差别

这里会显示出您选择的修订版和当前版本之间的差别。

到此差别页面的链接

两侧同时换到之前的修订记录 前一修订版
mosfet [2016/06/06 16:37]
admin 		mosfet [2016/06/06 16:40] (当前版本)
admin
行 3: 行 3:
  
 {{ :​1024px-d2pak.jpg |}} {{ :​1024px-d2pak.jpg |}}
- 
- 
  
 Although the MOSFET is a four-terminal device with source (S), gate (G), drain (D), and body (B) terminals,​[1] the body (or substrate) of the MOSFET is often connected to the source terminal, making it a three-terminal device like other field-effect transistors. Because these two terminals are normally connected to each other (short-circuited) internally, only three terminals appear in electrical diagrams. The MOSFET is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common. Although the MOSFET is a four-terminal device with source (S), gate (G), drain (D), and body (B) terminals,​[1] the body (or substrate) of the MOSFET is often connected to the source terminal, making it a three-terminal device like other field-effect transistors. Because these two terminals are normally connected to each other (short-circuited) internally, only three terminals appear in electrical diagrams. The MOSFET is by far the most common transistor in both digital and analog circuits, though the bipolar junction transistor was at one time much more common.
行 35: 行 33:
 When a voltage is applied between the gate and body terminals, the electric field generated penetrates through the oxide and creates an "​inversion layer" or "​channel"​ at the semiconductor-insulator interface. The inversion channel is of the same type, p-type or n-type, as the source and drain, and thus it provides a channel through which current can pass. Varying the voltage between the gate and body modulates the conductivity of this layer and thereby controls the current flow between drain and source. This is known as enhancement mode. When a voltage is applied between the gate and body terminals, the electric field generated penetrates through the oxide and creates an "​inversion layer" or "​channel"​ at the semiconductor-insulator interface. The inversion channel is of the same type, p-type or n-type, as the source and drain, and thus it provides a channel through which current can pass. Varying the voltage between the gate and body modulates the conductivity of this layer and thereby controls the current flow between drain and source. This is known as enhancement mode.
  
-Circuit symbols[edit]+====Circuit symbols====
 A variety of symbols are used for the MOSFET. The basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back at right angles into the same direction as the channel. Sometimes three line segments are used for enhancement mode and a solid line for depletion mode (see depletion and enhancement modes). Another line is drawn parallel to the channel for the gate. A variety of symbols are used for the MOSFET. The basic design is generally a line for the channel with the source and drain leaving it at right angles and then bending back at right angles into the same direction as the channel. Sometimes three line segments are used for enhancement mode and a solid line for depletion mode (see depletion and enhancement modes). Another line is drawn parallel to the channel for the gate.
- 
 The "​bulk"​ or "​body"​ connection, if shown, is shown connected to the back of the channel with an arrow indicating pMOS or nMOS. Arrows always point from P to N, so an NMOS (N-channel in P-well or P-substrate) has the arrow pointing in (from the bulk to the channel). If the bulk is connected to the source (as is generally the case with discrete devices) it is sometimes angled to meet up with the source leaving the transistor. If the bulk is not shown (as is often the case in IC design as they are generally common bulk) an inversion symbol is sometimes used to indicate PMOS, alternatively an arrow on the source may be used in the same way as for bipolar transistors (out for nMOS, in for pMOS). The "​bulk"​ or "​body"​ connection, if shown, is shown connected to the back of the channel with an arrow indicating pMOS or nMOS. Arrows always point from P to N, so an NMOS (N-channel in P-well or P-substrate) has the arrow pointing in (from the bulk to the channel). If the bulk is connected to the source (as is generally the case with discrete devices) it is sometimes angled to meet up with the source leaving the transistor. If the bulk is not shown (as is often the case in IC design as they are generally common bulk) an inversion symbol is sometimes used to indicate PMOS, alternatively an arrow on the source may be used in the same way as for bipolar transistors (out for nMOS, in for pMOS).
  
-Comparison of enhancement-mode and depletion-mode MOSFET symbols, along with JFET symbols. The orientation of the symbols, (most significantly the position of source relative to drain) is such that more positive voltages appear higher on the page than less positive voltages, implying current flowing "​down"​ the page:[4][5][6] +Comparison of enhancement-mode and depletion-mode MOSFET symbols, along with JFET symbols. The orientation of the symbols, (most significantly the position of source relative to drain) is such that more positive voltages appear higher on the page than less positive voltages, implying current flowing "​down"​ the page:
 Comparison of n- and p-type MOSFETs[7] Comparison of n- and p-type MOSFETs[7]
 Parameter nMOSFET pMOSFET Parameter nMOSFET pMOSFET
行 49: 行 45:
 Gate type (poly Si) n+ poly-Si p+ poly-Si Gate type (poly Si) n+ poly-Si p+ poly-Si
 Gate type (metal) φm ~ Si CB φm ~ Si VB Gate type (metal) φm ~ Si CB φm ~ Si VB
-Well type p-type n-type +Well type p-type n-typeThreshold ​voltage, Vth positive (enhancement) negative (depletion) negative (enhancement) positive (depletion)
-Threshold ​voltage, Vth positive (enhancement) negative (depletion) negative (enhancement) positive (depletion)+
 Band-bending Downwards Upwards Band-bending Downwards Upwards
 Inversion layer carriers electrons holes Inversion layer carriers electrons holes
行 57: 行 52:
 JFET N-Channel Labelled.svg IGFET N-Ch Enh Labelled.svg IGFET N-Ch Enh Labelled simplified.svg Mosfet N-Ch Sedra.svg IGFET N-Ch Dep Labelled.svg N-channel JFET N-Channel Labelled.svg IGFET N-Ch Enh Labelled.svg IGFET N-Ch Enh Labelled simplified.svg Mosfet N-Ch Sedra.svg IGFET N-Ch Dep Labelled.svg N-channel
 JFET MOSFET enh MOSFET enh (no bulk) MOSFET dep JFET MOSFET enh MOSFET enh (no bulk) MOSFET dep
 +
 +{{ :​mosfet_symbol.png |}}
 +
 In schematics where G, S, D are not labeled, the detailed features of the symbol indicate which terminal is source and which is drain. For enhancement-mode and depletion-mode MOSFET symbols (in columns two and five), the source terminal is the one connected to the triangle. Additionally,​ in this diagram, the gate is shown as an "​L"​ shape, whose input leg is closer to S than D, also indicating which is which. However, these symbols are often drawn with a "​T"​ shaped gate (as elsewhere on this page), so it is the triangle which must be relied upon to indicate the source terminal. In schematics where G, S, D are not labeled, the detailed features of the symbol indicate which terminal is source and which is drain. For enhancement-mode and depletion-mode MOSFET symbols (in columns two and five), the source terminal is the one connected to the triangle. Additionally,​ in this diagram, the gate is shown as an "​L"​ shape, whose input leg is closer to S than D, also indicating which is which. However, these symbols are often drawn with a "​T"​ shaped gate (as elsewhere on this page), so it is the triangle which must be relied upon to indicate the source terminal.
  
 For the symbols in which the bulk, or body, terminal is shown, it is here shown internally connected to the source (i.e., the black triangles in the diagrams in columns 2 and 5). This is a typical configuration,​ but by no means the only important configuration. In general, the MOSFET is a four-terminal device, and in integrated circuits many of the MOSFETs share a body connection, not necessarily connected to the source terminals of all the transistors. For the symbols in which the bulk, or body, terminal is shown, it is here shown internally connected to the source (i.e., the black triangles in the diagrams in columns 2 and 5). This is a typical configuration,​ but by no means the only important configuration. In general, the MOSFET is a four-terminal device, and in integrated circuits many of the MOSFETs share a body connection, not necessarily connected to the source terminals of all the transistors.
  
-MOSFET operation[edit]+====MOSFET operation====
  
 Metal–oxide–semiconductor structure on p-type silicon Metal–oxide–semiconductor structure on p-type silicon
行 345: 行 343:
  
 Tri-state circuitry sometimes incorporates a CMOS MOSFET switch on its output to provide for a low-ohmic, full-range output when on, and a high-ohmic, mid-level signal when off. Tri-state circuitry sometimes incorporates a CMOS MOSFET switch on its output to provide for a low-ohmic, full-range output when on, and a high-ohmic, mid-level signal when off.
-