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mico32处理器 [2016/05/25 12:11] gongyu 创建 |
mico32处理器 [2016/05/25 12:17] (当前版本) gongyu |
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| - | ====关于LatticeMico32==== | + | {{ :latticemico32.gif|}}====关于LatticeMico32==== |
| The LatticeMico32™ is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement. The LatticeMico32 provides the visibility, flexibility and portability that you expect in an open source hardware design. Everything you need is provided, including software development tools (via LatticeMico™ System) and evaluation boards to try out your designs in hardware. | The LatticeMico32™ is a 32-bit Harvard, RISC architecture "soft" microprocessor, available for free with an open IP core licensing agreement. The LatticeMico32 provides the visibility, flexibility and portability that you expect in an open source hardware design. Everything you need is provided, including software development tools (via LatticeMico™ System) and evaluation boards to try out your designs in hardware. | ||
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| - Dual WISHBONE memory interfaces (Instruction and Data) | - Dual WISHBONE memory interfaces (Instruction and Data) | ||
| + | ====框图==== | ||
| + | {{ :latticemico32core.png |}} | ||
| + | {{ :latticemico32processorblock.png |}} | ||
| + | ====性能和所用资源==== | ||
| + | |||
| + | Performance and Resource Utilization1 | ||
| + | Lattice FPGA Family Configuration LUTs fMAX (MHz) | ||
| + | LatticeECP3 Standard 2,370 115 | ||
| + | LatticeXP2TM Standard 2,406 85 | ||
| + | LatticeECP2/M Standard 2,497 110 | ||
| + | 1Performance and utilization characteristics are generated using Lattice Diamond software. When using the LatticeMico32 in a different density, speed, or grade within the Lattice FPGA family, performance may vary. | ||